Among current novel memory technologies, phase change memory (also known as phase change random access memory, PCRAM) based on chalcogenide semiconductor material has attracted worldwide attention by its outstanding advantages such as low cost, high speed, high memory density, simple process and nice compatibility with present complementary metal-oxide semiconductor (CMOS) process of integrated circuits. It is one of the main research directions to reduce the current and power consumption and to enhance the data retention and the reliability of phase change material. Many famous companies in the world have devote themselves to the research on phase change memory, mainly comprising Ovonyx, Intel, Samsung, IBM, Bayer, ST Micron, AMD, Panasonic, Sony, Philips, British Areospace, Hitachi and Macronix.
In order to reduce the power consumption and enhance the data retention and reliability, efforts can be made in two aspects: material and device structure. With regard to the device structure, there are various kinds of methods to achieve improvements. The structure of phase change memory can be divided into the following: classic “mushroom” structure, μ-Trench structure, Pore structure, GST limited structure, edge contact structure, quantum wire structure, GST spacer structure and etc. The key point of the classic T-shape structure lies in the fabrication of the bottom heating electrode, so the operation region reduction of this kind of structure can only be achieved by reducing the bottom electrode so as to reduce the operation voltage and power consumption. The purpose of any kind of structure is to reduce the contact area between electrode and phase change material and thus reduce the reversible phase change region of SET and RESET for lower current and power consumption. The decrease of the operation current shows an obvious linear relationship with the reduction of the phase change region, wherein the reduction of the phase change operation region can be realized mainly by two methods: decreasing the dimension of phase change material and reducing the dimension of the heating electrode; meanwhile, it is also an useful method to effectively prevent thermal diffusion in reversible phase change by the dielectric transition layer between the electrode and phase change material for the purpose of low voltage and low power consumption.
Furthermore, as the integrated circuits technology and the CMOS process develop into 45 nm and 22 nm, the low-k dielectric material are used more frequently in the CMOS circuits. By using low-k dielectric material as the inter layer dielectrics (ILD), the parasitic capacitance and signal crosstalk can be reduced such that the distance between interconnecting wires can be narrowed to further enhance the chip integrated level, and meanwhile, by using the low-k dielectric material, the signal transmission delay is reduced to increase chip speed.